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12-bit, 20/40/65 msps 3 v a/d converter ad9235 rev. c in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . s p ecificatio n s subj ec t to ch an g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2004 analog de vices, i n c. al l r i ght s r e ser v ed . features single 3 v supp ly operation (2. 7 v to 3. 6 v) snr = 70 dbc to nyqu ist at 65 msps sfdr = 85 db c to nyq u ist at 6 5 msps low power: 300 mw at 65 ms ps differential inp u t with 500 mhz bandwidth on-chip reference and sha dnl = 0.4 lsb flexible analog input: 1 v p-p to 2 v p-p range offset binary o r twos comple ment data format clock du ty cy cle stabilizer applic ati o ns ultrasound eq uipment if sampling in communications receivers is-95, cdm a -o ne, imt-2000 battery-powered instrum e nts hand-hel d scopemeters low cost digital oscilloscopes func tio n a l block di agram sha vin+ vin? drvdd 8-stage 1 1/2-bit pipeline clk pdwn mode clock duty cycle stabilizer mode select dgnd otr d11 d0 avdd mdac1 correction logic output buffers ref select agnd 0.5v vref sense ad9235 02461-001 reft refb a/d a/d 4 16 12 3 fi g u r e 1 . general description the ad9235 is a fa mil y o f m o noli thic, sin g le 3 v s u p p l y , 12-b i t, 20/40/65 ms ps a n alog-t o-dig i ta l co n v er t e rs (ad c s). this fa mi ly fe a t ur es a hig h p e r f o r ma n c e s a m p le -an d -h old a m plif ier (s h a ) an d v o l t a g e r e f e r e n c e . th e ad9235 us es a m u l t ista g e d i f f e r e n ti al p i pe l i n e d a r c h i t ec t u r e w i t h o u t p u t err o r co rr ecti o n log i c t o p r o v ide 12-b i t acc u rac y a t 20/40 /65 ms ps da ta r a t e s a nd gua r an te e no missin g co des o v er t h e f u l l o p er a t in g t e m p era t ur e ra ng e . the wide b a n d wi d t h, t r u l y dif f er en t i a l s h a al lo ws a va r i ety o f us er -s e l e c t a b l e i n p u t ran g es an d o f fs ets in cl udi n g sin g le-e n d e d a p plic a t ion s . i t is sui t ab le fo r m u l t i p lexe d sy st e m s t h a t s w i t ch f u l l -s cale v o l t a g e le v e l s in s u cce s s i v e c h a n ne ls and f o r s a m p lin g s i ng l e - c h a n n el i n put s a t f r e q u e nc i e s w e l l b e y o n d t h e n y qu i s t r a te. c o m b i n e d wi t h p o we r and c o st s a v i ng s ov e r p r e v iou sly a v a i la b l e ad cs, th e ad9235 is s u i t ab le f o r a p p l ica t ion s in co mm uni c a t io ns, ima g ing, an d m e dica l u l t r as ound . a sin g le-e nde d c l o c k in p u t is us e d t o con t r o l al l in t e r n al co n v ersio n c y cles. a d u ty c y cle s t a b i l i z er (d cs) co m p e n s a t e s f o r w i d e v a ria t io n s i n t h e c l ock d u t y c y c l e wh ile m a in ta in i n g exce l l en t o v eral l ad c p e r f o r ma n c e . th e dig i t a l o u t p ut da t a is p r es en t e d in s t r a ig h t b i na r y o r tw os co m p lem e n t f o r m a t s. an out - of - r ang e ( o t r ) s i g n a l i n d i c a te s a n ove r f l ow c o nd it i o n t h at ca n b e us e d wi t h t h e m o st sig n i f ica n t b i t t o deter m in e lo w o r h i g h ove r f l ow . f a b r ica t ed on an ad van c e d cm os p r o c es s, the ad9235 is a v a i l - a b le in a 28-le a d t ssop and a 32-le ad lfcsp a nd is sp e c if ie d o v er t h e i n d u s t r i al t e m p era t ur e ra n g e (C40c t o +85c). product highlights 1. the ad9235 o p era t es f r o m a sin g le 3 v p o w e r s u p p l y a nd fe a t ur es a s e p a r a te dig i t a l o u t p u t dr i v er su p p ly to acco m m o - da t e 2.5 v a nd 3 . 3 v log i c fa milies. 2. o p era t ing a t 65 ms ps, th e ad9 235 co n s u m es a lo w 300 mw . 3. the p a ten t e d sh a in p u t m a in t a in s exce l l en t p e r f o r ma n c e fo r in p u t f r eq uen c ies u p t o 100 mh z and c a n be c o nf igur ed f o r sin g le-e n d e d o r dif f er en t i al op er a t io n. 4. the ad9235 p i n o u t is simil a r to th e ad9214-6 5 , a 10-b i t, 65 ms ps ad c. this al lo ws a sim p lif i ed u p g r ade p a th f r o m 10 b i ts t o 12 b i ts f o r 65 ms ps sys t em s. 5. t h e cl o c k d c s m a i n t a i n s ove r a l l a d c p e r f or manc e ove r a wide ra n g e o f clo c k p u ls e wid t hs. 6. the otr o u t p ut b i t i n di c a t e s w h e n t h e sig n al is b e yo n d t h e se l e ct e d in p u t ra n g e .
ad9235 rev. c | page 2 of 40 table of contents specifications ..................................................................................... 3 dc specifications ......................................................................... 3 digital specifications ................................................................... 4 switching specifications .............................................................. 4 ac specifications .......................................................................... 5 absolute maximum ratings ............................................................ 7 explanation of test levels ........................................................... 7 esd caution .................................................................................. 7 pin configurations and function descriptions ........................... 8 definitions of specifications ........................................................... 9 equivalent circuits ......................................................................... 10 typical performance characteristics ........................................... 11 applying the ad9235 .................................................................... 15 theory of operation .................................................................. 15 analog input ............................................................................... 15 clock input considerations ...................................................... 16 power dissipation and standby mode .................................... 17 digital outputs ........................................................................... 18 volt age reference ....................................................................... 18 operational mode selection ..................................................... 19 tssop evaluation board .......................................................... 19 lfcsp evaluation board ........................................................... 20 outline dimensions ....................................................................... 36 ordering guide .......................................................................... 37 revision history 10/04data sheet changed from rev. b to rev. c changes to format .............................................................universal changes to specifications .................................................................3 changes to the ordering guide.................................................... 37 5/03data sheet changed from rev. a to rev. b added cp-32 package (lfcsp)........................................universal changes to several pin names .........................................universal changes to features...........................................................................1 changes to product description .....................................................1 changes to product highlights........................................................1 changes to specifications .................................................................2 replaced figure 1 ..............................................................................3 changes to absolute maximum ratings ........................................5 changes to ordering guide .............................................................5 changes to pin function descriptions...........................................6 new definitions of specifications section .....................................7 changes to tpcs 1 to 12...................................................................9 changes to theory of operation section.................................... 13 changes to analog input section..................................................13 changes to single-ended input configuration section .............14 replaced figure 8 ............................................................................14 changes to clock input considerations section ........................14 changes to table i ...........................................................................15 changes to power dissipation and standby mode section .......15 changes to digital outputs section..............................................15 changes to timing section ............................................................15 changes to figure 13.......................................................................16 changes to figures 16 to 26 ...........................................................17 added lfcsp evaluation board section .....................................17 inserted figures 27 to 35 ................................................................25 added table iii ................................................................................30 updated outline dimensions........................................................31 8/02data sheet changed from rev. 0 to rev. a updated ru-28 package................................................................ 24
ad9235 rev. c | page 3 of 40 specifications dc specifications avdd = 3 v, drvdd = 2.5 v, maximum sample rate, 2 v p-p differential input, 1.0 v internal reference, t min to t max , unless otherwise noted. table 1. ad9235bru/bcp-20 ad9235bru /bcp-40 ad9235bru/bcp-65 parameter temp test level min typ max min typ max min typ max unit resolution full vi 12 12 12 bits accuracy no missing codes guaranteed full vi 12 12 12 bits offset error full vi 0.30 1.20 0.50 1.20 0.50 1.20 % fsr gain error 1 full vi 0.30 2.40 0.50 2.50 0.50 2.60 % fsr differential nonlinearity (dnl) 2 full iv 0.35 0.65 0.35 0.75 0.40 0.80 lsb 25c i 0.35 0.35 0.35 lsb integral nonlinearity (inl) 2 full iv 0.45 0.80 0.50 0.90 0.70 1.30 lsb 25c i 0.40 0.40 0.45 lsb temperature drift offset error full v 2 2 3 ppm/c gain error full v 12 12 12 ppm/c internal voltage reference output voltage error (1 v mode) full vi 5 35 5 35 5 35 mv load regulation @ 1.0 ma full v 0.8 0.8 0.8 mv output voltage error (0.5 v mode) full v 2.5 2.5 2.5 mv load regulation @ 0.5 ma full v 0.1 0.1 0.1 mv input referred noise vref = 0.5 v 25c v 0.54 0.54 0.54 lsb rms vref = 1.0 v 25c v 0.27 0.27 0.27 lsb rms analog input input span, vref = 0.5 v full iv 1 1 1 v p-p input span, vref = 1.0 v full iv 2 2 2 v p-p input capacitance 3 full v 7 7 7 pf reference input resistance full v 7 7 7 k? power supplies supply voltages avdd full iv 2.7 3.0 3.6 2.7 3.0 3.6 2.7 3.0 3.6 v drvdd full iv 2.25 3.0 3.6 2.25 3.0 3.6 2.25 3.0 3.6 v supply current iavdd 2 full v 30 55 100 ma idrvdd 2 full v 2 5 7 ma psrr full v 0.01 0.01 0.01 % fsr power consumption dc input 4 full v 90 165 300 mw sine wave input 2 full vi 95 110 180 205 320 350 mw standby power 5 full v 1.0 1.0 1.0 mw 1 gain error and gain temperature coefficient are based on the adc only (with a fixed 1.0 v external reference). 2 measured at maximum clock rate, f in = 2.4 mhz, full-scale sine wave, with approx imately 5 pf loading on each output bit. 3 input capacitance refers to the effectiv e capacitance between one differential input pin and agnd. refer to for the e quivalent analog input structure. figure 5 4 measured with dc input at maximum clock rate. 5 standby power is measured with a dc input, the clk pin inactive (i.e., set to avdd or agnd).
ad9235 rev. c | page 4 of 40 digital specifications table 2. ad9235bru/bcp-20 ad9235bru /bcp-40 ad9235bru/bcp-65 parameter temp test level min typ max min typ max min typ max unit logic inputs high level input voltage full iv 2.0 2.0 2.0 v low level input voltage full iv 0.8 0.8 0.8 v high level input current full iv C10 +10 C10 +10 C10 +10 a low level input current full iv C10 +10 C10 +10 C10 +10 a input capacitance full v 2 2 2 pf logic outputs 1 drvdd = 3.3 v high-level output voltage full iv 3.29 3.29 3.29 v (ioh = 50 a) high-level output voltage full iv 3.25 3.25 3.25 v (ioh = 0.5 ma) low-level output voltage full iv 0.2 0.2 0.2 v (iol = 1.6 ma) low-level output voltage full iv 0.05 0.05 0.05 v (iol = 50 a) drvdd = 2.5 v high-level output voltage full iv 2.49 2.49 2.49 v (ioh = 50 a) high-level output voltage full iv 2.45 2.45 2.45 v (ioh = 0.5 ma) low-level output voltage full iv 0.2 0.2 0.2 v (iol = 1.6 ma) low-level output voltage full iv 0.05 0.05 0.05 v (iol = 50 a) 1 output voltage levels measured with 5 pf load on each output. switching specifications table 3. ad9235bru/bcp-20 ad9235bru /bcp-40 ad9235bru/bcp-65 parameter temp test level min typ max min typ max min typ max unit clock input parameters maximum conversion rate full vi 20 40 65 msps minimum conversion rate full v 1 1 1 msps clk period full v 50.0 25.0 15.4 ns clk pulse-width high 1 full v 15.0 8.8 6.2 ns clk pulse-width low 1 full v 15.0 8.8 6.2 ns data output parameters output delay 2 (t pd ) full v 3.5 3.5 3.5 ns pipeline delay (latency) full v 7 7 7 cycles aperture delay (t a ) full v 1.0 1.0 1.0 ns aperture uncertainty jitter (t j ) full v 0.5 0.5 0.5 ps rms wake-up time 3 full v 3.0 3.0 3.0 ms out-of-range recovery time full v 1 1 2 cycles 1 for the ad9235-65 model only, with duty cy cle stabilizer enabled. dcs function not applicable for -20 and -40 models. 2 output delay is measured from clk 50% transition to data 50% transition, with 5 pf load on each output. 3 wake-up time is dependent on value of decoupling capacitors; ty pical values shown with 0.1 f and 10 f capacitors on reft and refb.
ad9235 r e v. c | pa ge 5 o f 4 0 t a t pd = 6.0ns max 2.0ns min n? 9 n ?8 n ? 7 n ? 6 n? 5 n ?4 n? 3 n ? 2 n? 1 n a nalo g input clk data out n? 1 n n+1 n+2 n+3 n+4 n+5 n+6 n+7 n+8 02461-002 f i g u re 2. ti ming d i ag r a m ac specific ations a v d d = 3 v , d r vd d = 2.5 v , maxim u m s a m p le ra t e , 2 v p-p dif f er en tial in p u t, a in = C0.5 db fs, 1.0 v in t e r n al r e f e r e n c e , t min to t max , unles s o t h e r w is e n o t e d. table 4. ad92 3 5 b r u / b c p - 2 0 ad92 35b r u / b c p - 4 0 a d 9 2 3 5 b r u / b c p - 6 5 p a r a m e t e r t e m p t e s t leve l m i n t y p ma x m i n t y p m a x m i n t y p m a x u n i t signal-to-noi s e r a t i o f inp u t = 2.4 mhz 25c v 70.8 70.6 70.5 dbc f inp u t = 9.7 mhz full iv 70.0 70.4 dbc 2 5 c i 7 0 . 6 dbc f inp u t = 19.6 mhz full iv 69.9 70.3 dbc 2 5 c i 7 0 . 4 dbc f inp u t = 32.5 mhz full iv 68.7 69.7 dbc 2 5 c i 7 0 . 1 dbc f inp u t = 100 mhz 25c v 68.7 68.5 68.3 dbc signal-to-noi se ratio and dis t ortio n f inp u t = 2.4 mhz 25c v 70.6 70.5 70.4 dbc f inp u t = 9.7 mhz full iv 69.9 70.3 dbc 2 5 c i 7 0 . 5 dbc f inp u t = 1 9 . 6 mhz f u l l i v 6 9 . 7 7 0 . 2 dbc 2 5 c i 7 0 . 3 dbc f inp u t = 3 2 . 5 mhz f u l l i v 6 8 . 3 6 9 . 5 dbc 2 5 c i 6 9 . 9 dbc f inp u t = 100 mhz 25c v 68.6 68.3 67.8 dbc to tal h a rmo n ic disto r tio n f inp u t = 2.4 mhz 25c v C88.0 C89.0 C87.5 dbc f inp u t = 9.7 mhz full iv C86.0 C79.0 dbc 2 5 c i C 8 7 . 4 dbc f inp u t = 19.6 mhz full iv C85.5 C79.0 dbc 2 5 c i C 8 6 . 0 dbc f inp u t = 32.5 mhz full iv C81.8 C74.0 dbc 2 5 c i C 8 2 . 0 dbc f inp u t = 100 mhz 25c v C84.0 C82.5 C78.0 dbc worst ha rmo n ic (second or t h ird) f inp u t = 9.7 mhz full iv C90.0 C80.0 dbc f inp u t = 19.6 mhz full iv C90.0 C80.0 dbc f inp u t = 32.5 mhz full iv C83.5 C74.0 dbc
ad9235 rev. c | page 6 of 40 ad9235bru/bcp-20 ad9235b ru/bcp-40 ad9235bru/bcp-65 parameter temp test level min typ ma x min typ max min typ max unit spurious-free dynamic range f input = 2.4 mhz 25c v 92.0 92.0 92.0 dbc f input = 9.7 mhz full iv 80.0 88.5 dbc 25c i 91.0 dbc f input = 19.6 mhz full iv 80.0 89.0 dbc 25c i 90.0 dbc f input = 32.5 mhz full iv 74.0 83.0 dbc 25c i 85.0 dbc f input = 100 mhz 25c v 84.0 85.0 80.5 dbc
ad9235 r e v. c | pa ge 7 o f 4 0 absolute maximum ratings table 5. pin name with respect to m i n m a x u n i t electr i c a l a v d d a g n d C 0 . 3 + 3 . 9 v d r v d d d g n d C 0 . 3 + 3 . 9 v a g n d d g n d C 0 . 3 + 0 . 3 v a v d d d r v d d C 3 . 9 + 3 . 9 v digital outputs dgnd C0.3 drvdd + 0.3 v clk, mode agnd C0.3 avdd + 0.3 v vin+, vinC agnd C0.3 avdd + 0.3 v vref agnd C0.3 avdd + 0.3 v sense agnd C0.3 avdd + 0.3 v refb, reft agnd C0.3 avdd + 0.3 v pdwn agnd C0.3 avdd + 0.3 v environ m en t a l 1 operating tem p erature C40 +85 c junction tempe r ature 150 c lead temperature (10 sec) 300 c storage temperature C65 +150 c 1 typi ca l t h e rm a l i m peda n c es (28- lea d tssop ) , ja = 67.7 c/w; (32- lea d lfcs p), ja = 32.5c/w, jc = 32.71c/w . th ese measu r eme n t s were t a ken on a 4-l a yer board in s t il l air, in accord ance with e i a / j e sd51-1. a b s o l u te max i m u m r a t i n g s a r e limi t i n g va l u e s to b e a p plie d indivi d u a l ly and b e yo nd w h ich t h e s e r v ice a b i li ty o f t h e cir c ui t ma y b e im p a ir e d . f u n c t i o n a l op era b i l i t y is n o t n e ce ss a r i l y im plie d . e x p o sur e to a b s o l u te m a x i m u m r a t i ng co ndi t i on s fo r a n ext e n d e d p e r i o d o f tim e ma y a f f e c t de vice r e l i ab ili t y . explanation of test levels test l e v e l s d e s c r i p t i o n i 100% production tested. ii 100% production tested at 25c and sample tested at specified tempe r atures. iii sample tested only. iv parameter is guaranteed by design and charact e riza- tion testing. v parameter is a typical va lue only. vi 100% production tested at 25c; guaranteed by de- sign and chara c terization testin g for industrial tem- perature range; 100% production tested at tem p era- ture extremes for military devices. esd caution esd (electrostatic discharge) sensitive device. ele c tr ostatic charg e s as high as 4000 v readily accumulate on the human body and test eq uipment and can discharg e wit h out detection. althou gh this product features proprietary esd protection circu i try, permanent damage may occur on devices s u bjec ted to high energy elec- trostatic dischar g es. t h erefore, proper esd prec aution s are reco mmended to avoid performanc e degradation or los s of functionality.
ad9235 r e v. c | pa ge 8 o f 4 0 pin conf igurations and f u ncti on descriptions 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 ad9235 top view (not to scale) mode sense vref avdd reft refb otr d10 d9 d8 d7 dgnd drvdd agnd vin+ vin? pdwn avdd agnd d6 d5 d4 d0 (lsb) clk d1 d2 d3 d11 (msb) 02461-003 f i g u re 3. 28-l e ad t ssop pin conf ig u r at io n 02461-004 24 23 22 21 1 2 3 32 av dd re fb re ft av dd agnd vin + vin ? agnd 20 19 18 17 d8 d9 d10 d11(msb) otr mode sense vref 9 10 11 12 13 d7 dgnd drv dd d6 d5 d4 d3 d2 14 15 16 4 5 6 7 8 d1 (lsb)d0 dnc dnc pdwn dnc clk dnc 31 30 29 28 27 26 25 ad9235 top view (not to scale) pin 1 indicator dnc = do not connect f i g u re 4. 32-l e ad l f csp p i n conf ig ur a t ion ta ble 6. pi n f u nct i on d e s c ri pt i o ns pin no. 28-lead tssop pin no. 32-lead lfcsp m n e m o n i c d e s c r i p t i o n 1 2 1 o t r o u t - o f - r a n g e i n d i c a t o r . 2 22 mode data format and clock duty cy cle stabilizer (dcs) mode select ion. 3 23 sense reference mode selection. 4 24 vref voltage reference input/ output. 5 25 refb differential reference (?). 6 26 reft differential reference (+). 7, 12 27, 32 avdd analog power s u pply. 8, 11 28, 31 agnd analog ground. 9 29 vin+ analog input pin (+). 10 30 vinC analog input pin (?). 13 2 clk clock input pin. 14 4 pdwn power-down function selection (active high). 15 to 22, 25 to 2 8 7 to 14, 17 to 20 d0 (lsb) to d11 (msb) data output bit s . 2 3 1 5 d g n d digital o u t p u t g r o u n d . 24 16 drvdd digital output driver supply. mu st be decoupled to dgnd with a minimum. 0.1 f capacitor. recommended decoup ling is 0. 1 f in parallel with 10 f. 1, 3, 5, 6 dnc do not connect.
ad9235 rev. c | page 9 of 40 definitions of specifications analog bandwidth (full power bandwidth) the analog input frequency at which the spectral power of the fundamental frequency (as determined by the fft analysis) is reduced by 3 db. aperture delay (t a ) the delay between the 50% point of the rising edge of the clock and the instant at which the analog input is sampled. aperture jitter (t j ) the sample-to-sample variation in aperture delay. integral nonlinearity (inl) the deviation of each individual code from a line drawn from negative full scale through positive full scale. the point used as negative full scale occurs ? lsb before the first code transition. positive full scale is defined as a level 1 ? lsbs beyond the last code transition. the deviation is measured from the middle of each particular code to the true straight line. differential nonlinearity (dnl, no missing codes) an ideal adc exhibits code transitions that are exactly 1 lsb apart. dnl is the deviation from this ideal value. guaranteed no missing codes to 12-bit resolution indicates that all 4096 codes must be present over all operating ranges. offset error the major carry transition should occur for an analog value ? lsb below vin+ = vinC. offset error is defined as the deviation of the actual transition from that point. gain error the first code transition should occur at an analog value ? lsb above negative full scale. the last transition should occur at an analog value 1 ? lsb below the positive full scale. gain error is the deviation of the actual difference between first and last code transitions and the ideal difference between first and last code transitions. temperature drift the temperature drift for offset error and gain error specifies the maximum change from the initial (25c) value to the value at t min or t max . power supply rejection ratio the change in full scale from the value with the supply at the minimum limit to the value with the supply at its maximum limit. total harmonic distortion (thd) 1 the ratio of the rms sum of the first six harmonic components to the rms value of the measured input signal. 1 ac specifications may be reported in dbc (degrades as signal levels are lowered) or in dbfs (always related back to converter full scale). signal-to-noise and distortion (sinad) 1 the ratio of the rms signal amplitude (set 0.5 db below full scale) to the rms value of the sum of all other spectral compo- nents below the nyquist frequency, including harmonics but excluding dc. effective number of bits (enob) the enob for a device for sine wave inputs at a given input frequency can be calculated directly from its measured sinad using the following formula n = ( sinad ? 1.76)/6.02 signal-to-noise ratio (snr) 1 the ratio of the rms signal amplitude (set at 0.5 db below full scale) to the rms value of the sum of all other spectral compo- nents below the nyquist frequency, excluding the first six harmonics and dc. spurious-free dynamic range (sfdr) 1 the difference in db between the rms amplitude of the input signal and the peak spurious signal. two-tone sfdr 1 the ratio of the rms value of either input tone to the rms value of the peak spurious component. the peak spurious component may or may not be an imd product. clock pulse width and duty cycle pulse-width high is the minimum amount of time that the clock pulse should be left in the logic 1 state to achieve rated performance. pulse-width low is the minimum time the clock pulse should be left in the low state. at a given clock rate, these specifications define an acceptable clock duty cycle. minimum conversion rate the clock rate at which the snr of the lowest analog signal frequency drops by no more than 3 db below the guaranteed limit. maximum conversion rate the clock rate at which parametric testing is performed. output propagation delay (t pd ) the delay between the clock logic threshold and the time when all bits are within valid logic levels. out-of-range recovery time the time it takes for the adc to reacquire the analog input after a transition from 10% above positive full scale to 10% above negative full scale, or from 10% below negative full scale to 10% below positive full scale.
ad9235 rev. c | page 10 of 40 equivalent circuits avdd vin+, vin ? 02461-005 f i g u re 5. equ i v a l e n t a n al og input c i rc uit avdd mode 20k ? 02461-006 f i g u r e 6 . e q ui v a le nt m o d e i n p u t c i r c ui t d11 ?d0, otr drvdd 02461-007 f i gure 7 . e q ui v a lent di gi tal o u tput circui t 02461-008 clk, pdwn avdd f i gure 8 . e q ui v a lent di gi tal input c i r c ui t
ad9235 rev. c | page 11 of 40 typical perf orm ance cha r acte ristics a v d d = 3.0 v , d r vd d = 2.5 v , f sa mp le = 65 ms ps wi th d c s dis a b l ed , t a = 25c, 2 v dif f er en tial in p u t, a in = ?0.5 db fs, vref = 1.0 v , unles s o t h e r w is e n o t e d. 02461-009 frequency (mhz) 32.5 0 6.5 13.0 19.5 26.0 magnitude (dbfs ) 0 ?20 ?40 ?60 ?80 ? 100 ? 120 snr = 70.3dbc sinad = 70.2dbc enob = 11.4 bits thd = ? 86.3dbc sfdr = 89.9dbc f i gure 9. s i ngl e t o n e 8 k fft with f in = 1 0 mh z 02461-010 frequency (mhz) 91.0 65.0 71.5 78.0 84.5 magnitude (dbfs ) 0 ?20 ?40 ?60 ?80 ? 100 ? 120 snr = 69.4dbc sinad = 69.1dbc enob = 11.2 bits thd = ? 81.0dbc sfdr = 83.8dbc f i gure 10. sing le t o ne 8k ff t w i th f in = 70 mh z 02461-011 frequency (mhz) 130.0 97.5 104.0 110.5 117.0 123.5 magnitude (dbfs ) 0 ?20 ?40 ?60 ?80 ? 100 ? 120 snr = 68.5dbc sinad = 66.5dbc enob = 10.8 bits thd = ? 71.0dbc sfdr = 71.2dbc f i gure 11. sing le t o ne 8k ff t w i th f in = 10 0 m h z 02461-012 sample rate (msps) 65 40 45 50 55 60 s nr/s f dr (dbc ) 100 95 90 80 70 60 85 75 65 55 50 sfdr (2v diff) snr (2v se) snr (2v diff) sfdr (2v se) f i g u re 12. a d 9 2 3 5 - 65: sing le t o ne s n r / sfdr v s . f clk with f in = n y qui s t (32. 5 m h z) 02461-013 sample rate (msps) 40 20 25 30 35 s nr/s f dr (dbc ) 100 95 90 85 80 75 70 65 60 55 50 snr (2v se) sfdr (2v diff) snr (2v diff) sfdr (2v se) f i g u re 13. a d 9 2 3 5 - 40: sing le t o ne s n r / sfdr v s . f clk with f in = n y quis t ( 20 m h z) 02461-014 sample rate (msps) 20 0 5 10 15 s nr/s f dr (dbc ) 100 90 95 85 80 75 65 70 55 60 50 sfdr (2v diff) snr (2v diff) sfdr (2v se) snr (2v se) f i g u re 14. a d 9 2 3 5 - 20: sing le t o ne s n r / sfdr v s . f clk with f in = n y quis t ( 10 m h z)
ad9235 rev. c | page 12 of 40 02461-015 a in (dbfs) 0 ?30 ? 25 ? 2 0 ? 15 ? 1 0 ? 5 s nr/s f dr (dbfs a nd dbc ) 100 90 80 70 60 50 40 sfdr single-ended (dbfs) sfdr differential (dbc) snr differential (dbfs) sfdr single-ended (dbc) snr differential (dbc) snr single-ended (dbc) sfdr differential (dbfs) snr single-ended (dbfs) f i g u re 15. a d 9 2 3 5 - 65: sing le t o ne s n r / sfdr v s . a in wi th f in = n y qui s t (32. 5 m h z) 02461-016 a in (dbfs) 0 ?30 ? 25 ? 2 0 ? 15 ? 1 0 ? 5 s nr/s f dr (dbfs a nd dbc ) 100 90 80 70 60 50 40 sfdr single-ended (dbfs) snr differential (dbc) snr single-ended (dbc) snr differential (dbfs) snr single-ended (dbfs) sfdr single-ended (dbc) sfdr differential (dbc) sfdr differential (dbfs) f i g u re 16. a d 9 2 3 5 - 40: sing le t o ne s n r / sfdr v s . a in wi th f in = n y quist (2 0 m h z) 02461-017 a in (dbfs) 0 ?30 ? 25 ? 2 0 ? 15 ? 1 0 ? 5 s nr/s f dr (dbfs a nd dbc ) 100 90 80 70 60 50 40 snr differential(dbc) snr single-ended (dbc) snr differential (dbfs) snr single-ended (dbfs) sfdr differential (dbc) sfdr single-ended (dbfs) sfdr differential (dbfs) sfdr single-ended(dbc) f i g u re 17. a d 9 2 3 5 - 20: sing le t o ne s n r / sfdr v s . a in wi th f in = n y quist (1 0 m h z) 02461-018 input frequency (mhz) 125 0 2 5 5 0 7 5 100 s nr/s f dr (dbc ) 95 90 85 80 75 70 65 snr sfdr f i g u re 18. a d 9 2 3 5 - 65: snr / sf dr v s . f in 02461-019 input frequency (mhz) 125 0 2 5 5 0 7 5 100 s nr/s f dr (dbc ) 95 90 85 80 75 70 65 snr sfdr f i g u re 19. a d 9 2 3 5 - 40: snr / sf dr v s . f in 02461-020 input frequency (mhz) 125 0 2 5 5 0 7 5 100 s nr/s f dr (dbc ) 95 90 85 80 75 70 65 snr sfdr f i g u re 20. a d 9 2 3 5 - 20: snr / sf dr v s . f in
ad9235 rev. c | page 13 of 40 02461-021 frequency (mhz) 65.0 32.5 39.0 45.5 52.0 58.5 magnitude (dbfs ) 0 ?20 ?40 ?60 ?80 ? 100 ? 120 snr = 64.6dbfs sfdr = 81.6dbfs f i gure 21. d u al t o n e 8 k fft with f in1 = 45 m h z and f in2 = 4 6 mh z 02461-022 frequency (mhz) 97.5 65.0 71.5 78.0 84.5 91.0 magnitude (dbfs ) 0 ?20 ?40 ?60 ?80 ? 100 ? 120 snr = 64.3dbfs sfdr = 81.1dbfs f i gure 22. d u al t o n e 8 k fft with f in1 = 69 m h z and f in2 = 7 0 mh z 02461-023 frequency (mhz) 162.0 130.0 136.5 143.0 149.5 156.0 magnitude (dbfs ) 0 ?20 ?40 ?60 ?80 ? 100 ? 120 snr = 62.5dbfs sfdr = 75.6dbfs f i gure 23. d u al t o n e 8 k fft with f in1 = 14 4 m h z and f in 2 = 14 5 m h z 02461-024 a in (dbfs) ?6 ?24 ? 21 ? 1 8 ? 15 ? 1 2 ? 9 s nr/s f dr (dbfs ) 95 90 85 80 75 70 65 60 1v snr 1v sfdr 2v snr 2v sfdr f i gure 24. d u al t o n e snr/sf dr vs. a in with f in 1 = 4 5 m h z and f in 2 = 4 6 m h z 02461-025 a in (dbfs) ?6 ?24 ? 21 ? 1 8 ? 15 ? 1 2 ? 9 s nr/s f dr (dbfs ) 95 90 85 80 75 70 65 60 1v snr 1v sfdr 2v snr 2v sfdr f i gure 25. d u al t o n e snr/sf dr vs. a in with f in 1 = 6 9 m h z and f in 2 = 7 0 m h z 02461-026 a in (dbfs) ?6 ?24 ? 21 ? 1 8 ? 15 ? 1 2 ? 9 s nr/s f dr (dbfs ) 95 90 85 80 75 70 65 60 1v snr 1v sfdr 2v snr 2v sfdr f i gure 26. d u al t o n e snr/sf dr vs. a in with f in 1 = 144 mh z a n d f in 2 = 14 5 m h z
ad9235 rev. c | page 14 of 40 02461-027 sample rate (msps) 60 01 0 2 0 3 0 4 0 5 0 e n ob (bits ) 9.7 12.2 11.7 11.2 10.7 10.2 s i nad (d bc ) 75 72 69 66 63 60 ad9235-65: 1v sinad ad9235-40: 2v sinad ad9235-65: 2v sinad ad9235-20: 2v sinad ad9235-20: 1v sinad ad9235-40: 1v sinad f i gure 27. sinad vs. f clk with f in = n y qu ist 02461-028 duty cycle (%) 65 35 40 45 50 55 60 s i nad/s f dr (dbc ) 90 80 70 60 50 40 30 sinad: dcs off sfdr: dcs off sfdr: dcs on sinad: dcs on f i gure 28. sinad/ s f dr vs. clock d u t y c y cle 02461-029 sample rate (msps) 80 ? 4 0 ? 3 0 ? 2 0 ? 1 0 0 1 0 2 03 04 0 5 06 0 7 0 s i nad/s f dr (dbc ) 90 85 80 75 70 60 55 65 50 sinad 2v diff sinad 1v diff sfdr 1v diff sfdr 2v diff f i gure 29. sinad/ s f dr vs. t e mper ature with f in = 3 2 .5 mh z 02461-030 temperature ( c ) 80 ?40 0 ? 2 0 2 04 06 0 gain draft (ppm/ c) 20 15 10 5 0 ?5 ?10 ?15 ?20 f i gure 30. a / d g a i n v s . t e mper ature using an e x tern a l r e fer e n c e 02461-031 code 4000 0 500 1000 1500 2000 2500 3000 3500 inl ( l sb) 1.0 0.8 0.6 0.4 0.2 0 ?0.2 ?0.4 ?0.6 ?0.8 ?1.0 f i g u re 31. t y pic a l i n l 02461-032 code 4000 0 500 1000 1500 2000 2500 3000 3500 dnl (ls b ) 1.0 0.8 0.6 0.4 0.2 0 ?0.2 ?0.4 ?0.6 ?0.8 ?1.0 f i g u re 32. t y pic a l d n l
ad9235 rev. c | page 15 of 40 applying the ad9235 theory of operat ion the ad9235 a r c h i t ec t u r e co n s is ts o f a f r o n t end s h a f o l l o w ed b y a p i p e lin e d s w i t ch e d c a p a ci to r ad c. th e p i p e lin e d ad c is divide d i n to t h r e e s e c t io n s , consist i n g o f a 4- b i t f i rst st a g e fol l o w e d b y eig h t 1.5- b i t s t a g es a nd a f i nal 3 - b i t f l as h. e a ch s t a g e p r o v ides s u f f i cien t o v erla p t o c o r r e c t fo r f l as h er r o rs in t h e p r eced in g s t a g es . t h e q u a n tize d o u t p u t s f r o m ea c h s t a g e a r e co m b in e d in t o a f i nal 12-b i t r e su l t in t h e dig i t a l co r r ec tio n log i c. the p i p e li ne d ar chi t e c t u r e p e r m i t s t h e f i rs t s t ag e t o o p era t e o n a ne w i n p u t s a m p le w h i l e t h e r e ma inin g s t a g es o p era t e on p r eced in g sa m p l e s . sa m p l i n g occur s o n th e ri s i n g ed g e of t h e cl o c k . e a ch s t a g e o f t h e p i p e li n e , excl udin g t h e last, co n s is ts o f a lo w re s o lut i on f l a s h a d c c o n n e c te d to a s w i t c h e d c a p a c i tor d a c a nd i n t e rst a ge resid u e a m pl if ier (md a c). the r e sid u e a m pl if ier ma g n if ies t h e di f f er en ce b e tw e e n t h e r e co n s t r uc t e d d a c o u t p u t a nd t h e f l ash i n p u t fo r t h e n e xt s t a g e in t h e pi p e li n e . o n e b i t o f r e d u ndan c y is us ed in each s t a g e t o facili t a te dig i tal co r r e c tio n of f l ash e r rors . the l a st st age s i m p ly c o ns ists of a f l as h a d c . the i n p u t st a g e co n t a i n s a dif f er en t i al s h a t h a t ca n b e ac - o r dc-co u ple d in dif f er en t i al o r sing le-e n d e d m o des. th e ou t p u t - s t a g i n g b l o c k ali g n s t h e da t a , ca r r i es o u t t h e er r o r co r r e c t i o n , a nd p a s s es t h e da t a t o t h e ou t p u t b u f f ers. th e o u t p ut b u f f ers a r e p o we re d f r om a s e p a r a te su p p ly , a l l o wing adj u st me n t of t h e o u t p ut v o l t a g e s w i n g. d u r i n g p o w e r - do wn, t h e o u t p ut b u f f ers go in to a h i g h i m p e dance st a t e. analog input the a n alog in pu t t o t h e a d 923 5 is a dif f er en t i a l sw i t ch e d ca p a c i t o r s h a tha t has b e en de sig n e d fo r o p tim u m p e r f o r m- a n c e w h i l e p r o c es sin g a dif f er en t i al i n p u t sig n al . the s h a in p u t can su pp or t a wid e co m m o n - m o d e r a n g e a nd ma i n t a in e x c e l l e n t p e r f or m a n c e, a s s h ow n i n fi g u re 3 4 . a n i n put c o m m on - m o d e vo lt age of m i d s upply m i n i m i z e s s i g n a l - d e p e nd e n t e r ror s and prov i d e s opt i m u m p e r f or m a n c e. r e f e rri n g t o f i g u r e 3 3 , th e c l oc k s i gn al al t e rn a t i v e l y sw i t c h e s th e s h a b e t w e e n s a m p le m o d e and h o l d m o de. w h e n t h e s h a is swi t ch e d in t o s a m p le m o de , t h e sig n al s o ur ce m u s t be ca p a b l e o f c h a r g i n g th e s a m p le c a p a ci t o rs a n d s e t t l i n g wi t h in one-half of a cl o c k c y cl e. a s m a l l res i stor in s e r i es wi t h e a ch in p u t c a n h e l p r e d u ce t h e p e ak t r a n sie n t c u r r en t r e q u ir e d f r o m t h e o u t p ut s t a g e o f t h e dr iv in g s o ur ce . a l s o , a smal l s h u n t c a p a ci t o r ca n b e place d acr o s s t h e in p u ts t o p r o v ide d y na mic cha r g i n g c u r r en ts. this p a s s i v e n e t w o r k cr e a t e s a l o w-p a s s f i l t er a t t h e ad c s in p u t; t h er efo r e , t h e p r e c is e val u es a r e dep e n d e n t u p o n t h e a p plic a t ion. i n i f un ders am pling a p plic a t ion s , an y sh u n t ca p a c i t o rs sh o u ld b e r e m o v e d . i n com b ina t io n wi t h t h e dr iving s o ur ce im p e dance, t h e y w o u l d li mi t t h e i n p u t b a n d wi d t h. f o r b e st dy n a m i c p e r f or m a nc e, t h e s o u r c e i m p e d a nc e s d r iv i n g vin+ an d vinC s h o u l d b e ma tch e d s u ch t h a t c o mm on- m o d e s e t t ling er r o rs a r e symm et r i cal . th e s e er r o rs a r e r e d u ce d b y t h e c o m m on - m o d e re j e c t i o n of t h e a d c . vin+ vin? c par c par 5pf 5pf t t 02461-033 h t t h f i g u re 33. swit che d - c apaci t o r s h a in put an in t e r n al dif f er en t i a l r e fer e nce b u f f er cr e a t e s p o si t i v e and ne g a t i v e re f e re n c e vo lt age s , r e f t a n d r e f b , re sp e c t i vely , t h a t def i ne t h e s p a n o f t h e a d c co re . the o u t p u t comm on m o de o f t h e r e fer e n c e b u f f er is s e t t o mids u p pl y , a nd t h e reft an d ref b vol t a g es and sp a n a r e def i n e d as: reft = ?( av d d + vref ) refb = ?( av d d ? vref ) sp a n = 2 ( reft ? refb ) = 2 vref i t ca n be seen f r o m th e eq ua ti o n s a b o v e tha t t h e r e ft a n d refb v o l t a g es ar e symm et r i cal a b o u t t h e midsu p pl y v o l t a g e a n d , b y def i ni t i o n , t h e in pu t s p a n is t w i c e t h e v a l u e o f t h e v r e f vol t age. 02461-034 common-mode level (v) 3.0 0 0.5 1.0 1.5 2.0 2.5 thd (dbc ) ?5 0 ?9 0 ?7 5 ?8 0 ?8 5 ?5 5 ?6 0 ?6 5 ?7 0 s nr (dbc ) 90 85 80 75 70 65 60 55 50 snr 35mhz 2v diff thd 35mhz 2v diff thd 2.5mhz 2v diff snr 2.5mhz 2v diff f i g u re 34. a d 9 2 3 5 - 65: snr , t h d v s . co mm on-m ode l e ve l
ad9235 rev. c | page 16 of 40 the i n t e r n al v o l t a g e r e fer e n c e c a n b e p i n- s t ra pp e d t o f i xe d val u es o f 0.5 v o r 1.0 v , o r ad j u s t ed wi thin t h e s a me ra n g e as d i scu s sed i n t h e i n t e rn al r e f e r e n c e c o nn ecti o n secti o n . m a xi- m u m s n r p e r f o r ma n c e is achiev e d wi th t h e ad9235 s e t t o t h e la rgest in p u t sp a n o f 2 v p-p . t h e r e la t i v e snr deg r ad a t ion is 3 db w h en c h a n g i n g f r o m 2 v p-p m o de t o 1 v p-p m o de . the s h a ma y b e dr i v en f r o m a s o ur ce tha t k eeps th e sig n al p e aks w i t h i n t h e al lo wa b l e ra n g e fo r t h e s e le c t e d r e fer e n c e v o l t - a g e. t h e mini m u m an d m a x i m u m co m m on- m o d e i n p u t l e vels a r e def i ne d as: vc m min = vref /2 vc m ma x = ( av d d + vref )/2 the minim u m co mm o n -mo d e in p u t l e v e l al lo ws th e ad9235 t o acco mm o d a t e g r o u n d -r efer en c e d i n p u ts . al th o u g h o p tim u m pe rf o r m a n c e i s a c h i e v ed wi th a di f f e r e n ti al in p u t, a sin g le-en d e d s o ur ce ma y be dr i v en in t o vin+ o r vinC. i n t h is co nf igur a t io n, on e in pu t accep t s t h e sig n a l , w h i l e t h e opp o s i te i n put s h ou l d b e s e t to mi ds c a l e b y c o n n e c t i ng it to an a ppropr i a t e re f e re nc e. f o r e x amp l e, a 2 v p - p s i g n a l m a y b e a p plie d t o vin + w h i l e a 1 v r e fer e n c e is a p plie d t o vin C . t h e ad9235 t h en accep t s an in p u t sig n al va r y in g b e tw een 2 v and 0 v . i n t h e sin g l e -e n d e d co nf ig ur a t io n, disto r t i o n p e r f o r ma n c e ma y deg r ade sig n if ican t l y as com p a r e d t o t h e dif f er en t i al c a s e . h o we ver , t h e ef fe c t is l e ss not i c e a b l e a t lower in p u t f r e q u e nc ie s and in th e l o w e r s p eed g r ade m o de ls ( a d9235- 40 a n d ad9235- 20) . differenti a l input config urations a s p r ev i o us l y de ta il ed , o p t i m u m pe rf o r m a n c e i s a c h i ev ed wh ile dr i v in g the ad9235 in a dif f er en tial in p u t co nf igura t io n. f o r bas e band a p p l ic a t io n s , t h e ad8 138 dif f er en tial dr i v er p r o v ides exce l l en t p e r f o r ma nce and a f l exi b le i n t e r f ace to t h e a d c. th e o u t p u t co mm on-m o d e v o l t a g e o f th e ad8138 is easil y s e t t o a v dd/2, and t h e dr i v er ca n b e co nf igur e d in a sa l l en- k e y f i l t e r t o p o log y t o p r o v ide ban d l i mi t i n g o f th e in p u t sig n al . ad9235 vin+ vin? avdd 1vp-p 49.9 ? 523 ? 1k ? 1k ? 0.1 f 22 ? 22 ? 15pf 15pf 499 ? 499 ? 499 ? agnd 02461-035 ad8138 f i g u re 35. d i f f e r e nt ia l input conf ig u r a t ion u s i n g t h e a d 8 1 3 8 a t in p u t f r e q uen c ies i n t h e s e c o nd n y q u ist zon e and ab o v e , t h e p e r f o r ma n c e o f m o st am plif iers is n o t a d e q ua t e t o achie v e t h e tr ue p e r f o r ma nce o f th e ad923 5. this is es p e c i al l y tr ue in if un ders am plin g a p plic a t ion s w h er e f r e q uen c ies in t h e 70 m h z to 100 mh z ra n g e a r e bein g s a m p led . f o r th es e a p p l ica t ion s , d i f f e r e n ti al tra n sf o r m e r co u p li n g i s th e r e co mme n d ed in p u t co nf igur a t io n, a s sh own i n f i gu r e 36. 02461-036 ad9235 vin+ vin? avdd 49.9 ? 22 ? 22 ? 15pf 15pf agnd 1k ? 1k ? 0.1 f 2 vp-p f i g u re 36. d i f f e r e nt ia l t r ans f or mer - co upled conf ig u r at io n the sig n a l cha r ac t e r i st ics m u st b e con s ider e d w h e n s e le c t in g a tra n sfo r m e r . m o s t rf tra n sfo r m e rs s a t u r a t e a t f r e q uen c ies b e lo w a fe w m h z, and exces s i v e sig n al p o w e r ca n als o c a us e co r e sa t u ra ti o n , wh i c h lead s t o d i s t o r ti o n . single-ended input configuration a sin g le-e nde d in p u t ma y p r o v i d e ade q u a te p e r f o r ma n c e i n cost-s en s i t i v e a p plica t io n s . i n t h is co nf igura t ion, t h er e is d e g r a - d a t i on i n sf dr an d i n d i s t or t i on p e r f or m a nc e d u e to t h e l a r g e in p u t co m m on- m o d e s w i n g. h o w e v e r , if t h e s o ur ce im p e dan c es o n e a ch i n p u t a r e ma t c h e d , t h er e s h o u ld b e li t t le ef f e c t o n s n r p e r f o r ma n c e . f i g u r e 37 deta ils a typ i cal sin g le- en d e d i n p u t conf igur a t io n. 02461-037 ad9235 vin+ vin? avdd 49.9 ? 22 ? 22 ? 15pf 15pf agnd 1k ? 1k ? 1k ? 1k ? 2 vp-p 0.33 f 0.1 f 10 f f i gure 37. sing le -ended input config ur ation clock i n pu t co nsider atio ns t y p i cal hig h sp e e d ad cs us e b o th c l o c k e d g e s t o g e n e r a t e a va r i ety o f in ter n a l t i ming sig n a l s, a nd as a r e su lt , ma y b e s e n s i - ti v e t o c l o c k d u ty c y c l e . c o mm onl y a 5% t o lerance is r e q u ir ed o n th e c l oc k d u ty c y c l e t o m a i n ta i n d y n a mi c perf o r m a n c e c h a r - ac t e r i s t ics. th e ad9235 co n t a i n s a c l o c k d u ty c y c l e s t a b ilizer (d cs) t h a t r e t i m e s t h e n o n s am plin g e d ge , p r o v idin g a n i n t e r n a l clo c k sig n a l wi t h a n o m i na l 50 % d u ty c y cle. this a l lo ws a wid e ra n g e o f clo c k i n p u t d u ty c y cle s w i t h ou t a f fe c t i n g t h e p e r f o r m- a n c e o f th e ad9 235. a s sh o w n in f i gur e 30, n o is e an d dis t o r - t i o n p e r f o r ma nce a r e ne a r l y f l a t o v er a 30% ra ng e o f d u ty c y cle . the d u ty c y cle s t a b i l izer us es a de l a y-lo ck e d lo o p (d ll) t o cr e a t e t h e n o n s am plin g e d ge. a s a r e su l t , an y cha n ges t o t h e s a m p ling f r eq uen c y r e q u ir e a p p r o x ima t e l y 100 c l o c k c y c l es t o al lo w t h e d ll to acq u ir e an d lo ck t o t h e n e w ra t e .
ad9235 rev. c | page 17 of 40 h i g h s p e e d , hig h r e s o l u t i o n ad cs a r e s e n s i t i v e t o t h e quali t y o f t h e clo c k in p u t. the deg r a d a t ion in s n r a t a g i v e n f u l l -s c a le in p u t f r e q uen c y (f inp u t ) d u e o n l y t o a p er t u r e ji t t er (t j ) ca n be calc u l a t ed b y snr d e g r ada t ion = ?20 log 10 [2 f input t j ] i n t h e e q ua t i o n , t h e r m s a p er t u re ji t t er , t j , r e p r esen ts t h e r o o t - s u m s q ua r e o f a l l ji t t er s o ur ces, whic h in c l ude t h e c l o c k in p u t, a n a l og in p u t sig n a l , a nd a d c a p er t u r e ji t t er sp e c if ica t ion. u n ders am plin g a p plic a t ion s a r e p a r t ic u l a r ly s e n s i t i v e t o ji t t er . the clo c k i n p u t sh o u ld b e t r e a te d as an a n a l og sig n a l in c a s e s w h er e a p er t u r e ji t t er ma y a f fe c t t h e dyna mic ran g e o f t h e ad9235. p o w e r s u p p lies f o r c l o c k dr i v ers sh o u ld b e s e p a ra t e d f r om t h e a d c output d r ive r suppl i e s to a v oi d mo d u l a t i n g t h e clo c k sig n a l wi t h dig i t a l n o is e . l o w ji t t er , cr ysta l-co n t r o l l e d os cil l a t o r s ma k e th e bes t c l o c k s o ur ces. i f th e c l o c k is g e n e ra t e d f r om anot he r t y p e of s o u r c e ( b y g a t i n g , d i v i d i n g , or ot he r me t h - o d s), i t sh o u ld b e r e time d b y t h e o r ig inal c l o c k a t th e last s t e p . power diss ipat io n an d sta n db y mode a s sh o w n in f i g u r e 38, th e p o w e r dis s i p a t ed b y th e ad9235 is prop or t i on a l to it s s a m p l e r a te. t h e d i g i t a l p o we r d i ss ip a t i o n d o e s n o t v a r y s u b s ta n t i a ll y betw ee n t h e th r e e s p eed gra d es b e ca us e i t is de ter m in e d p r ima r i l y b y t h e st r e n g t h o f t h e d i g i t a l dr i v ers a nd t h e lo ad o n e a ch o u t p u t b i t. th e maxim u m dr vdd cu rr e n t c a n be cal c ul a t ed a s i dr v d d = v dr v d d c loa d f cl k n w h er e n is t h e n u m b er o f o u t p u t b i ts, 12 in t h e cas e o f t h e ad9235. this maxim u m c u r r en t o c c u rs w h en ev er y o u t p u t b i t s w i t c h e s on e v e r y cl o c k c y cl e, i. e. , a f u l l - s c a l e s q u a re w a ve a t t h e ny q u i s t f r e q u e n c y , f clk / 2 . i n p r a c t i c e , t h e d r v d d c u r r e n t i s es t a b l ish e d b y t h e a v era g e n u m b er o f o u t p ut b i ts s w i t ching, w h ich is det e r m in e d b y t h e e n c o de ra te an d t h e cha r ac t e r i st ics o f th e a n alog i n p u t si gn al . 02461-038 sample rate (msps) 60 0 1 0 2 03 0 4 05 0 total power (mw) 325 300 275 250 225 200 175 150 125 100 75 50 ad9235-20 ad9235-40 ad9235-65 f i gure 38. t o t a l p o w e r v s . s a mp le ra te with f in = 1 0 mh z f o r th e ad9235 -20 s p ee d g r ade , th e dig i t a l p o w e r co n s um p t io n ca n r e p r es e n t a s m u ch as 10 % of t h e to t a l dissi p a t io n. d i g i t a l p o w e r co n s um pt io n can b e m i n i mi ze d b y r e d u c i n g t h e c a p a ci - t i v e lo ad p r es en t e d t o t h e o u t p ut dr i v ers. the da t a i n f i gur e 38 was t a k e n wi t h a 5 pf lo ad o n e a ch o u t p u t dr i v er . t h e a n alog ci r c ui tr y i s o p ti m a ll y b i ased so th a t ea c h s p ee d g r ade p r o v ides exce l l en t p e r f o r ma nce w h ile a f fo r d in g r e d u ce d p o w e r co n s um pt io n. e a ch sp e e d g r ade di ssi p a t es a b a s e li n e p o w e r a t lo w s a m p le ra t e s tha t in cr e a s e s lin e a r ly wi t h the c l o c k fr e q u e n c y . b y as s e r t in g the p d wn p i n hig h , th e ad9235 is p l ace d in st andb y mo de. i n t h is st a t e, t h e a d c ty p i c a l l y diss i p a t e s 1 m w if t h e cl k and a n a l og in p u t s a r e st a t ic. d u r i n g st and b y , t h e o u t p ut dr i v ers ar e place d in a hi g h im p e dan c e st a t e. re a s s e r t ing th e pd wn p i n lo w r e t u r n s th e ad9235 in t o i t s n o r m al o p er a t io na l mo de. l o w p o w e r dissi p a t io n i n st andb y m o de is achi e v e d b y sh ut t i ng d o w n t h e re f e re nc e, re f e re n c e bu f f e r , and bi a s i n g ne t w or k s . t h e de co u p lin g ca p a ci to rs o n ref t an d ref b a r e dis c ha rge d w h e n en t e r i n g st and b y m o de an d t h e n m u st b e r e ch arge d w h en r e t u r n in g t o n o r m a l o p era t io n. a s a r e su lt, t h e wa k e -u p t i me is rel a te d to t h e t i me sp e n t i n st andb y mo de, and shor te r st andb y c y cl e s re su lt i n prop or t i on a l ly shor te r w a ke - u p t i me s . w i t h t h e r e co mmen d e d 0.1 f a nd 10 f deco u p lin g ca p a ci t o rs o n ref t a nd ref b , i t t a k e s a p p r o x im a t ely 1 s e c to f u l l y dis c ha rge t h e re f e re nc e bu f f e r d e c o up l i ng c a p a c i tor s a n d 3 m s to re store f u l l op e r a t i o n .
ad9235 rev. c | page 18 of 40 ta ble 7. r e fere nce co nfi g ura t i o n sum m a r y selected mode sense voltage internal switch position re sulting vref (v) resulting di ffe rential span ( v p-p) external reference avdd n/a n/ a 2 external reference internal fixed reference vref sense 0.5 1.0 programmable reference 0.2 v to vref sense 0.5 (1 + r2/r1) 2 vref (see fi gure 40) internal fixed reference agnd to 0.2 v internal divider 1.0 2.0 digi tal ou tputs the ad9235 o u t p u t dr i v ers can be co nf igur e d to in t e r f ace wi t h 2.5 v o r 3.3 v log i c fa milies b y ma t c hin g dr vd d t o th e dig i t a l s u p p l y o f t h e i n t e r f ace d log i c. th e o u t p ut dr i v e r s a r e size d t o p r o v ide s u f f i cien t o u t p u t c u r r en t t o dr i v e a wi de va r i ety o f logic fa mi lies. h o w e ver , la rg e dr i v e c u r r en ts t e nd t o ca us e c u r r en t g l i t ch es o n t h e su p p lies t h a t ma y a f fe c t co n v er t e r p e r f o r ma n c e . a p plica t ion s r e q u ir in g t h e a d c t o dr i v e la rge ca p a c i t i v e lo ads or l a r g e f a n - out s m a y re qu i r e e x te r n a l bu f f e r s or l a tc he s . a s de t a i l e d in t a b l e 8, t h e da t a fo r m a t can b e s e le c t e d fo r ei t h er of f s e t bi n a r y or t w o s c o m p l e me n t . timing the ad9235 p r o v ides l a t c h e d da ta ou t p u t s wi t h a p i p e lin e dela y of s e ve n cl o c k c y cl e s . d a t a output s are a v ai l a bl e one prop ag a - ti o n de la y (t pd ) a f t e r th e ri si n g ed g e o f th e c l oc k si gn al . r e f e r t o f i gur e 2 f o r a d e ta iled t i min g dia g ram. the len g th o f t h e o u t p u t da ta lin e s and lo ads p l ace d on them s h o u ld b e minimized t o r e d u ce tra n sien ts wi thin the ad9235; th e s e tra n si e n t s ca n d e tra c t f r o m th e co n v e r t e r s d y n a mi c pe rf o r m a n c e . the lo w e s t typ i cal con v ersio n r a t e o f t h e ad92 35 is 1 ms ps. a t clo c k ra tes b e lo w 1 ms ps, d y n a mic p e r f o r ma n c e ma y deg r ad e. voltage r e ference a s t a b le an d acc u ra t e 0.5 v v o l t a g e r e fer e n c e is b u i l t i n t o t h e ad9235. th e in p u t ra n g e ca n b e ad j u s t ed b y var y in g th e r e f e r - en c e v o l t a g e a p p l ied t o t h e ad9235, usin g ei ther th e in t e r n al re f e re nc e or an e x te r n a l ly a p p l i e d re f e re nc e vo lt age. t h e i n put sp an of t h e a d c t r a c k s re fe re n c e volt age ch an ge s l i ne arly . i f th e a d c i s b e i n g d r i v en d i f f e r e n ti all y th r o ugh a tra n sf o r m e r , t h e r e fer e n c e v o l t a g e ca n b e us e d t o b i as t h e cen t er t a p ( c om mo n - mo d e vo lt age ) . i n te rna l re fere nce conne c tion a co m p a r a t o r wi t h in t h e ad9 235 det e c t s t h e p o t e n t ial a t t h e s e ns e pin and co nf igur es t h e refer e n c e i n to one o f fo ur p o ssi - b l e s t a t es, w h ich a r e s u mma r i ze d in t a b l e 7. i f sens e is g r o u n d e d , t h e refer e n c e am plif i e r sw i t ch is c o nn e c te d t o t h e in t e r n al r e sis t o r di vider (s ee f i g u r e 39), s e t t in g vref t o 1 v . c o nn e c t i n g t h e s e ns e pin t o v r ef sw i t ch es t h e r e fer e n c e a m p l i f i e r o u t p u t t o th e s e n s e p i n , co m p le ti n g th e loo p a n d prov i d i n g a 0 . 5 v re f e re nc e output . i f a re s i stor d i v i d e r i s co nne c t e d as sho w n i n f i gur e 4 0 , t h e s w i t ch is aga i n s e t to t h e s e ns e pin. t h is p u ts t h e r e fer e n c e a m plif ier i n a n o ni n v er t i n g m o de w i t h th e vref o u t p u t def i n e d a s vref = 0.5 (1 + r2 / r1 ) adc core select logic ad9235 vin? vref sense vin+ refb reft 10 f 0.1 f 0.1 f1 0 f 0.1 f 0.1 f 0.5v 02461-039 + + f i gure 39. inte rn al r e fer e n c e configu r atio n i n a l l r e fer e n c e co nf igur a t io n s , ref t an d ref b dr i v e t h e a / d co n v ersio n co r e a nd es t a b l is h i t s in p u t s p a n . the in p u t ra n g e o f t h e ad c al wa ys e q uals t w ic e t h e v o l t a g e a t t h e r e fer e n c e p i n fo r ei t h er a n i n t e r n al o r a n ext e r n al r e fer e n c e . 02461-040 sense adc core select logic ad9235 vref vin ? vin+ refb reft 10 f 0.1 f 0.1 f1 0 f 0.1 f 0.1 f 0.5v r2 r1 + + f i g u re 40. p r og r a m m ab le r e f e rence conf ig ur at i o n
ad9235 rev. c | page 19 of 40 extern al r e f e r e nc e ope r atio n the us e o f a n e x t e r n al r e fer e n c e ma y b e n e ces s a r y t o enha n c e t h e ga i n acc u rac y o f t h e ad c o r t o im p r o v e t h er mal dr if t cha r ac t e r i st ics. w h en m u l t i p le ad cs t r ack on e a n o t h e r , a sin g l e re f e re nc e ( i n t e r n a l or e x te r n a l ) m a y b e ne c e ss a r y to re d u c e g a i n ma t c hin g er r o rs t o a n accep t a b l e lev e l . a hig h p r ecisio n ext e r n al r e fer e n c e ma y als o b e s e le c t e d to p r o v ide lo w e r ga in and o f fs et t e m p era t ur e dr i f t. f i gur e 41 s h ows t h e typ i cal dr if t cha r ac t e r i s - ti cs o f th e in t e r n al r e f e r e n c e in bo th 1 v a n d 0.5 v m o d e s. 02461-041 temperature ( c ) 80 ? 4 0 ? 3 0 ? 2 0 ? 1 0 0 1 02 03 04 05 06 07 0 vr ef er r o r ( % ) 1.2 1.0 0.8 0.6 0.4 0.2 0 vref = 1.0v vref = 0.5v f i g u re 41. t y pic a l v r e f d r if t w h en t h e s e nse p i n is t i e d t o a v d d , t h e i n te r n al r e fer e n c e is d i sa b l e d , allo w i n g th e us e o f a n ext e rn al r e f e r e n c e . an in t e rn al r e fer e n c e b u f f er lo ads t h e ext e r n al r e fer e n c e wi t h a n e q ui vale n t 7 k? lo ad . the i n t e r n a l b u f f er st i l l gen e r a t e s t h e p o si t i ve and ne g a t i v e f u l l - s c a l e re f e re nc e s , r e f t a n d r e f b , f o r t h e a d c co r e . the in p u t s p a n is al w a ys t w ice t h e val u e of t h e r e fer e n c e v o l t a g e; t h er efo r e , t h e ext e r n al refer e n c e m u s t b e limi t e d t o a max i m u m o f 1 v . i f th e in t e r n al ref e r e n c e o f the ad9235 is us ed t o dr i v e m u l t i p le co n v er t e rs t o i m p r o v e ga in ma t c hing, t h e lo adi n g o f t h e r e fer - en c e b y th e o t her co n v er t e rs m u s t be con s ider e d . f i gur e 42 dep i c t s h o w t h e in t e r n a l r e fer e nce v o l t a g e is a f fe c t e d b y lo ading. 02461-042 load (ma) 3.0 0 0.5 1.0 1.5 2.0 2.5 e rror (%) 0.05 0 ? 0.05 ? 0.10 ? 0.15 ? 0.20 ? 0.25 0.5v error (%) 1v error (%) f i g u re 42. v r e f ac cur a c y v s . l oad operational mode se lection a s di s c uss e d e a rlier , t h e ad923 5 ca n o u t p ut da t a i n ei t h er o f fs et b i na r y o r tw os co m p le m e n t fo rma t . t h er e is a l s o a p r o v isio n fo r ena b lin g o r dis a b l in g t h e clo c k d c s. th e mo d e p i n is a m u l t i - l e vel i n put t h a t c o n t rol s t h e d a t a for m a t and d c s st a t e. t h e in p u t t h r e sh old val u es a nd co r r es p o n d i n g m o de s e le c t io n s a r e out l i n e d i n t a bl e 8 . table 8. mod e selection mo de vo ltage data fo rmat duty cycle sta b ilizer avdd twos complem e nt disabled 2/3 avdd twos complement enabled 1/3 avdd offset binary enabled agnd (defa u lt) offset binary disabled the m o d e p i n is in t e r n al l y p u l l ed do wn t o a g nd b y a 20 k? re s i stor . tssop e v al uation board the ad9235 e v al ua t i o n bo a r d p r o v ides the s u p p o r t cir c ui tr y r e q u ir e d t o o p e r a t e t h e ad c in i t s va r i o u s mo des a nd co nf igu- ra t i o n s. th e con v er t e r ca n b e dr i v en dif f er en t i al l y , t h r o ug h a n ad8138 dr i v er o r a tra n sf o r m e r , o r sin g le-en d e d . s e p a ra t e p o w e r p i n s a r e p r o v ide d t o is ol a t e t h e d u t f r o m t h e s u pp o r t cir c ui t r y . e a ch in p u t conf igura t io n can b e s e le c t e d b y p r o p er co nne c t i on o f v a r i o u s j u m p ers ( r efer t o t h e s c h e ma t i cs). f i gure 4 3 s h o w s t h e t y p i cal ben c h c h a r a c t e ri z a ti o n s e t u p used t o eval u a t e th e ac p e r f o r ma n c e o f t h e ad9 235. i t is cr i t ical tha t sig n al s o ur ces wi t h v e r y lo w phas e n o is e (<1 ps r m s ji t t er) b e us e d t o r e alize t h e u l t i ma t e p e r f o r ma n c e o f t h e con v er t e r . p r o p er f i l t er - in g o f t h e in pu t sig n a l , t o r e m o v e ha r m o n ic s and lo w e r t h e i n t e - g r a t e d n o i s e a t t h e i n p u t, is als o n e ce s s a r y t o achie v e t h e s p e c i- f i e d noi s e p e r f or m a nc e. the a u x c l k i n p u t sh o u l d b e s e le c t e d i n a p pli c a t ion s r e q u ir ing t h e lo w e st j i t t er a nd snr p e r f o r ma nce, i . e., if un ders am pling cha r ac t e r i z a t i o n . i t a l lo ws t h e us er t o a p ply a clo c k in p u t sig n a l tha t is 4 the targ et s a m p le ra te o f th e ad9235. a lo w-ji t t er , dif f er en tial divide-b y-4 co u n t e r , th e m c 100l vel33d , p r o v ides a 1 c l o c k o u t p u t tha t is s u bs eq uen t l y r e t u r n e d bac k t o t h e cl k in p u t via jp9. f o r exa m p l e , a 260 mh z sig n al (s in us o i d) is divide d do w n to a 65 mh z sig n a l fo r clo c k i n g t h e ad c. n o te t h a t r 1 m u s t b e r e m o v e d w i th th e a u x c l k i n t e rf a c e . l o w e r ji t t er is o f t e n achie v e d wi t h t h is in t e r f ace si n c e ma n y rf sig n a l g e n e r a t o rs dis p l a y im p r o v ed p h as e n o is e a t hig h er o u t p u t f r e q uen c ies and th e s l e w r a t e o f th e sin u s o idal o u t p u t sig n al is 4 tha t o f a 1 sig n al o f eq ual am p l i t ude . c o m p lete s c h e ma t i cs and l a yo u t plo t s fol l o w a nd de m o nst r a t e t h e p r o p er r o u t i n g an d g r o u n d i n g t e chniq u es t h a t sh o u ld b e a p plie d a t t h e sys t em l e v e l .
ad9235 rev. c | page 20 of 40 lfcsp evaluation board the typ i cal b e nch s e t u p us e d t o e v al u a te t h e ac p e r f o r ma n c e o f th e ad9235 is simila r t o t h e t sso p e v al u a tio n b o a r d co n n e cti o n s (r ef e r t o th e sch e ma ti cs f o r co nn ec ti o n d e t a ils). the ad9235 can b e dr i v en sin g le-ende d o r dif f er en tial l y th r o ugh a tra n sf o r m e r . s e pa ra t e po w e r p i n s a r e p r o v i d ed t o i s o l a t e th e d u t f r o m th e s u p p o r t ci r c ui tr y . e a c h i n p u t co nf igur a t io n c a n b e s e le c t e d b y p r o p er co nn e c t i o n o f va r i o u s j u m p ers (r efer t o t h e s c h e ma t i cs). an al t e r n a t i v e dif f er en tial a n alo g in p u t p a th usin g a n ad8351 o p a m p is in c l u d ed in t h e l a yo u t b u t is n o t p o p u la t e d in p r o d uc - tio n . d e sig n ers in t e r e st e d in e v a l u a t in g t h e o p a m p wi t h t h e ad c sh o u ld r e m o v e c15, r12, a nd r3 and p o p u la te the o p a m p cir c ui t. th e p a s s i v e n e tw o r k betw een t h e ad83 51 o u t p u t s an d th e ad9235 al l o ws th e us er t o o p timize t h e f r eq uen c y r e s p o n s e of t h e op am p f o r t h e appl i c a t i o n . data capture and processing 3v ? + 3v ? + 3v ? + 3v ? + refin 10mhz refout hp8644, 2v p-p signal synthesizer hp8644, 2v p-p clock synthesizer band-pass filter s4 xfmr input s1 clock avdd dut avdd gnd gnd dut drvdd dvdd ad9235 tssop evaluation board j1 clock divider 02461-043 f i gure 43. t sso p ev aluation b o ar d connec t ions
ad9235 rev. c | page 21 of 40 r2 0 1k ? r1 7 1k ? r4 2 1k ? r2 7 5k ? r4 10k ? r3 10k ? d7 o d7 d 11o d 10o d9 o d8 o d7 o d6 o d5 o d4 o d3 o d2 o d1 o d0 o jp7 c3 7 0.1 f duta v dd duta v dd vin + vin ? otro c3 6 0.1 f c5 0 0.1 f u1 jp22 jp23 jp13 av d d dutclk wh t tp6 wh t tp17 dutdrv dd wh t tp5 a d 9235 d0 d1 d2 d4 d7 d1 1 otr av d d sen se pd wn re fb vin + vin ? av d d dgnd drv dd d5 mo de clk d3 d6 d8 d9 d1 0 ag n d vr ef re ft ag n d sh eet 3 r p 4 22 ? 4 c1 10 f 10v c2 0 10 f 10v c3 4 0.1 f c3 5 0.1 f c2 1 10 f 10v c5 7 0.1 f c2 2 10 f 10v c4 0 0.001 f c3 3 0.1 f c3 2 0.1 f c3 9 0.001 f 5 7 8 3 4 14 5 6 2 9 10 11 12 23 24 1 28 27 26 25 22 21 20 19 18 17 16 15 13 c3 8 0.1 f c2 3 10 f 10v c4 1 0.001 f jp25 jp24 jp6 jp1 jp2 avdd jp12 ag n d duta v ddin c5 9 0.1 f tp2 re d duta v dd c5 8 22 f 25v tb1 2 fbead l1 21 tb1 3 a v ddin c5 2 0.1 f tp1 re d av d d c4 7 22 f 25v tb1 1 fbead l2 21 jp11 ag n d drv ddin c5 3 0.1 f tp3 re d dutdrv dd c4 8 22 f 25v tb1 5 fbead l3 21 tb1 4 dv ddin c1 4 0.1 f tp4 re d dv dd c6 22 f 25v tb1 6 tp11 blk tp12 blk tp13 blk tp14 blk tp9 blk tp10 blk tp15 blk tp16 blk fbead l4 21 d6 o d6 r p 4 22 ? 3 6 d5 o d5 r p 4 22 ? 2 7 d4 o d4 r p 4 22 ? 1 8 d3 o d3 r p 3 22 ? 4 5 d2 o d2 r p 3 22 ? 3 6 d1 o d1 r p 3 22 ? 2 7 d0 o d0 r p 3 22 ? 1 8 otro otr r p 6 22 ? 4 5 r p 6 22 ? 3 6 r p 6 22 ? 2 7 r p 6 22 ? 1 8 d 11o d1 1 r p 5 22 ? 4 5 d 10o d1 0 r p 5 22 ? 3 6 d9 o d9 r p 5 22 ? 2 7 d8 o d8 r p 5 22 ? 1 8 02461-044 + + + + ++ + + + f i g u re 44. t sso p e v aluat i o n b o a r d s c hem a t i c , du t
ad9235 rev. c | page 22 of 40 wht tp7 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 5 7 3 1 hdr40ram j1 he ade r right angle male no e j e c tors otr c11 0.1 f d11 d10 d9 d8 dutclk u7 74vhc541 18 2 11 12 13 14 15 16 17 20 10 19 1 9 8 7 6 5 4 3 avdd avdd; 14 avdd; 7 21 12 5 6 avdd avdd avdd avdd jp4 d2 d1 auxclk mc100lvel33d u3 6 5 7 8 4 3 2 1 c13 0.1 f r1 49.9 ? avdd 1n5712 a2 a3 a4 a5 a6 a7 a8 g1 g2 gnd vcc y2 y3 y4 y5 y6 y7 y8 a1 y1 74vhc04 u8 74vhc04 u8 1n5712 cw nc ina inb incom vcc out vee ref u8 decoupling r19 500 ? r2 10 ? r18 500 ? r7 22 ? r11 49.9 ? r15 90 ? r13 113 ? r26 10k ? r25 10k ? c26 0.1 f c28 10 f 10v c24 0.1 f c5 10 f 10v d5 c12 0.1 f d3 d2 d1 d0 u6 74vhc541 18 2 11 12 13 14 15 16 17 20 10 19 1 9 8 7 6 5 4 3 21 a2 a3 a4 a5 a6 a7 a8 g1 g2 gnd vcc y2 y3 y4 y5 y6 y7 y8 a1 y1 c4 10 f 10v d4 d6 d7 dvdd r p 2 22 ? 8 9 r p 2 22 ? 7 10 r p 2 22 ? 6 11 r p 2 22 ? 5 12 r p 2 22 ? 4 13 r p 2 22 ? 3 14 r p 2 22 ? 2 15 r p 2 22 ? 1 16 r p 2 22 ? 8 9 r p 2 22 ? 7 10 r p 2 22 ? 6 11 r p 2 22 ? 5 12 r p 2 22 ? 4 13 r p 2 22 ? 3 14 r p 2 22 ? 2 15 dd7 dd6 dd5 dd4 dd3 dd2 dd1 dd0 da clk dotr dd1 1 dd1 0 dd9 dd8 r p 2 22 ? 1 16 t2 t1 ?1t 6 1 2 5 2 1 3 4 s5 clock 1 2 s1 r14 90 ? r12 113 ? c27 0.1 f avdd u9 decoupling c8 10 f 10v c10 0.1 f jp9 34 74vhc04 u8 jp3 13 12 74vhc04 u8 11 10 u8 98 74vhc04 u8 02461-045 r9 22 ? + + + f i g u re 45. t sso p e v aluat i o n b o a r d s c hem a t i c , cl ock inp u t s and o u t p ut buf f ering
ad9235 rev. c | page 23 of 40 r32 1k ? r23 1k ? r16 1k ? c18 0.1 f c2 val c9 0.33 f s2 2 1 2 1 avdd c7 0.1 f r5 49.9 ? c8 0.1 f c16 0.1 f c25 0.33 f r37 499 ? r6 40 ? r10 40 ? jp8 2 3 1 c15 10 f 10v 2 1 c69 0.1 f tp8 red jp5 c17 val r8 1k ? avdd avdd r41 1k ? r33 1k ? avdd amp input s4 2 1 xfmr input alt vee r34 523 ? r35 499 ? r31 49.9 ? r36 499 ? c19 10 f 10v 3 6 4 5 2 8 1 ad8138 u2 ab c42 val c45 val t2 t1 ?1t 6 52 1 3 4 s3 2 1 single input jp46 c43 15pf r22 22 ? vin? jp41 jp43 jp45 c44 15pf r21 22 ? vin+ jp40 jp42 c44b 02461-046 r24 49.9 ? +in vee vo ? voc vo+ vcc ?in + f i gur e 4 6 . tssop ev a l ua ti on bo ar d sche ma ti c , a n al o g inputs dd11 dd10 dd9 dd8 dd7 dd6 dd5 dd4 dd3 dd2 c30 0.1 f c31 0.01 f c49 0.1 f c51 0.1 f c54 22pf r28 49.9 ? r29 49.9 ? c55 22pf c56 0.1 f r30 2k ? daclk dd0 dd1 dvdd s6 wht tp18 ad9762 u4 nc2 db10 db19 db8 db7 db6 db5 db4 db3 nc1 db0 db1 db2 sleep reflo refio fsadj comp1 acom ioutb iouta comp2 avdd nc3 dcom dvdd clock msb-db11 02461-047 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 c29 0.1 f c46 0.01 f f i gur e 4 7 . tssop ev a l ua ti on bo ar d sche ma ti c , opti onal d a c
ad9235 rev. c | page 24 of 40 02461-048 f i g u re 48. t sso p e v aluat i o n b o a r d l a yout , p r im ar y s i de
ad9235 rev. c | page 25 of 40 02461-049 f i g u re 49. t sso p e v aluat i o n b o a r d l a yout , s e c o nd ar y s i de
ad9235 rev. c | page 26 of 40 02461-050 f i g u re 50. t sso p e v aluat i o n b o a r d l a yout , ground pla n e
ad9235 rev. c | page 27 of 40 _ 02461-051 f i g u re 51. t sso p e v aluat i o n b o a r d p o wer plan e
ad9235 rev. c | page 28 of 40 02461-052 f i g u re 52. t sso p e v aluat i o n b o a r d l a yout , p r im ar y s ilk s c r e en
ad9235 rev. c | page 29 of 40 02461-053 f i g u re 53. t sso p e v aluat i o n b o a r d l a yout , s e c o nd ar y s i l k s c r e e n
ad9235 rev. c | page 30 of 40 1 234 56 p13 p14 xfrin1 nc r single ended r18 25 ? extref 1v max e1 r1 10k ? gnd avdd gnd c22 10 f gnd c8 0.1 f p5 p6 p11 p1 p3 p4 2 2 mode refb r e f t a v d d agnd vin+ agnd avdd vin ? ad9235 u4 vr ef sen se mo de d1 1 otr d1 0 d9 d8 drvdd dgnd d7 d5 d6 d4 d3 d2 (lsb) drvdd gnd 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 d6x d5x d4x d2x d3x d1x d0x (msb) overrange bit av dd gnd drv dd vd l gnd va m p p2 h1 mthole6 3.0v 2.5v 5.0v rp1 220 ? r8 1k ? clk avdd r15 33 ? gnd gnd or l1 for filter gnd avdd r36 1k ? r26 1k ? gnd avdd avdd gnd gnd vin+ vin ? c19 15pf c21 10pf r2 xx r10 36 ? r42 0 ? r12 0 ? x out x out ampin gnd x out b x out b r3 0 ? r11 36 ? c26 10pf e 45 c16 0.1 f c6 0.1 f g nd amp c15 0.1 f l1 10nh gnd pri sec gnd c18 0.1 f j1 r7 1k ? 2.5v sense pin solderable jumper e to a external voltage divider e to b internal 1v reference (default) e to c external reference e to d internal 0.5v reference mode pin solderable jumper 5 to 1 twos complement/dcs off 5 to 2 twos complement/dcs off 5 to 3 offset binary/dcs on 5 to 4 offset binary/dcs off 25 26 27 28 29 30 31 32 16 15 14 13 12 11 10 9 dnc clk dnc dnc pd wn dnc d0 d1 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 gnd 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 drx d13x d12x d10x d11x d9x d8x rp2 220 ? h2 mthole6 h3 mthole6 h4 mthole6 gnd 3 r6 1k ? 4 1 r5 1k ? gnd avdd gnd d c13 0.10 f c e p8 b p9 p10 p7 a c29 10 f gnd r9 10k ? gnd c12 0.1 f gnd c9 0.10 f c11 0.1 f gnd c7 0.1 f r4 33k ? avdd r13 1k ? r25 1k ? gnd gnd c23 10pf c5 0.1 f ampinb t1 adt 1 ? 1 wt 1 52 6 4 3 x frin gnd pri sec optional xfr t2 ft c1? 1?13 1 2 5 4 3 ct ct r3, r17, r18 only one should be on board at a time 02461-054 + d7x f i g u re 54. lfcs p ev al uat i on bo ar d s c h e m a t i c , a n al og inp u t s and du t
ad9235 rev. c | page 31 of 40 drx d13x gnd d2x d1x gnd d0x d11x d12x drvdd d10x d9x gnd d8x d7x d5x d6x gnd d4x d3x drvdd 2clk 2db 2d7 gnd 2d6 2d5 v cc 1d2 1d1 1clk 2d4 2d3 gnd 2d2 2d1 1d7 1d6 1d5 1d8 gnd v cc 1d4 1d3 gnd 2qb 2q7 gnd 2q6 2q5 v cc 1q2 1q1 1oe 2q4 2q3 gnd 2q2 2q1 1q8 1q7 1q6 1q5 gnd v cc 1q4 1q3 gnd 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 in out clkat/dac 1 74lvth162374 u1 clklat/da c gnd gnd gnd gnd gnd gnd dry msb lsb 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 gnd dr msb gnd gnd header 40 dry drvdd drvdd gnd ampin ampinb gnd gnd gnd vamp c27 0.1 f c28 0.1 f c35 0.10 f c17 0.1 f r16 0 ? r14 25 ? r40 10k ? pwdn rgp1 inhi inlo rpg2 r41 10k ? r35 25 ? r34 1.2k ? amp in amp ad8351 u3 power down use r40 or r41 c44 0.1 f comm oplo oph1 vpos vocm 5 4 2 3 1 6 9 10 r33 25 ? r41 10k ? r19 50 ? vamp vamp r38 1k ? r39 1k ? gnd gnd c24 10 f gnd c45 0.1 f gnd r17 0 ? 7 gnd 8 02461-055 2oe + f i g u re 55. lfcs p ev al uat i on bo ar d s c h e m a t i c , d i g i t a l p a t h
ad9235 rev. c | page 32 of 40 clock timing adj us tme n ts for a buffe re d e ncode us e r2 8 for a dire ct e ncode us e r2 7 gnd e ncx en c r3 2 1k ? r3 7 25 ? r2 3 0 ? r2 2 0 ? rx dnp r2 8 0 ? e50 e 51 en c clk vd l g n d gnd vd l gnd pw r c4 3 0.1 f r3 1 1k ? r3 0 1k ? r2 9 50 ? j2 gnd vd l 1y e ncx 1 2 1 b 1 a dr sc h e m a tic sh ow s tw o ga te d e la y setu p for one de lay re mov e r2 2 and r3 7 and attach rx (rx = 0 ? ) c4 9 0.001 f c4 8 0.001 f c4 7 0.1 f c1 0.1 f c3 9 0.001 f c3 8 0.001 f c3 6 0.1 f c3 4 0.1 f c3 1 0.1 f c3 0 0.001 f c2 22 f drv dd gnd c3 7 0.1 f c4 0 0.001 f c2 0 10 f vd l gnd c4 6 10 f va m p gnd gnd c1 4 0.001 f c4 1 0.1 f c3 3 0.1 f av dd d i gita l b ypa ssin g analog by p a s s i ng d u t b ypa ssin g la tc h b ypa ssin g c3 2 0.001 f c2 5 10 f c3 10 f c4 10 f c1 0 22 f 2y 4 5 2 b 2 a 3y 9 10 3 b 3 a 4y 12 13 3 6 7 8 11 14 4 b 4 a clkat/dac r2 0 1k ? e52 e 53 vd l g n d r2 1 1k ? e31 e 35 vd l g n d r2 4 1k ? e43 e 44 vd l g n d r2 7 0 ? gnd v d l drv dd av dd 02461-056 e ncode gnd 74vc x 86 + + + + + + f i g u re 56. lfcs p ev al uat i on bo ar d s c h e m a t i c , c l ock input
ad9235 rev. c | page 33 of 40 02461-057 f i g u re 57. lfcs p ev al uat i on bo ar d lay o ut , p r i m ar y s i de 02461-058 f i g u re 58. lfcs p ev al uat i on bo ar d lay o ut , s e c o ndar y sid e 02461-059 f i g u re 59. lfcs p ev al uat i on bo ar d lay o ut , g r ound p l ane 02461-060 f i g u re 60. lfcs p ev al uat i on bo ar d lay o ut , p o we r p l ane
ad9235 rev. c | page 34 of 40 02461-061 f i g u re 61. lfcs p ev al uat i on bo ar d lay o ut , p r i m ar y s i lk s c reen 02461-062 f i g u re 62. lfcs p ev al uat i on bo ar d lay o ut , s e c o ndar y si lk s c r e en
ad9235 rev. c | page 35 of 40 table 9. lfcsp evaluation bo ard bill of materials (bom) item qty. omit 1 reference designator device package value recommended vendor/ part number supplied by adi 18 c1, c5, c7, c8, c9, c11, c12, c13, c15, c16, c31, c33, c34, c36, c37, c41, c43, c47 1 8 c6, c18, c27, c17, c28, c35, c45, c44 chip capacitor 0603 0.1 f 8 c2, c3, c4, c10, c20, c22, c25, c29 2 2 c46, c24 tantalum capacitor tajd 10 f 3 8 c14, c30, c32, c38, c39, c40, c48, c49 chip capacitor 0603 0. 001 f 4 3 c19, c21, c23 chip capacitor 0603 10 pf 5 1 c26 chip capacitor 0603 10 pf 9 e31, e35, e43, e44, e50, e51, e52, e53 6 2 e1, e45 header ehole jumper blocks 7 2 j1, j2 sma connector/50 ? sma 8 1 l1 inductor 0603 10 nh coilcraft/ 0603cs-10nxgbu 9 1 p2 terminal block tb6 wieland/25.602.2653.0, z5-530-0625-0 10 1 p12 header dual 20-pin rt angle header40 digi-key s2131-20-nd 5 r3, r12, r23, r28, rx 11 6 r37, r22, r42, r16, r17, r27 chip resistor 0603 0 ? 12 2 r4, r15 chip resistor 0603 33 ? 13 14 r5, r6, r7, r8, r13, r20, r21, r24, r25, r26, r30, r31, r32, r36 chip resistor 0603 1 k ? 14 2 r10, r11 chip resistor 0603 36 ? 1 r29 15 1 r19 chip resistor 0603 50 ? 16 2 rp1, rp2 resistor pack r_742 220 ? digi-key cts/742c163220jtr 17 1 t1 adt1-1wt awt1-1t mini-circuits 18 1 u1 74lvth162374 cmos register tssop-48 19 1 u4 ad9235bcp adc (dut) lfcsp-32 analog devices, inc. x 20 1 u5 74vcx86m soic-14 fairchild 21 1 pcb ad92xxbcp/pcb pcb analog devices, inc. x 22 1 u3 ad8351 op amp msop-8 analog devices, inc. x 23 1 t2 macom transformer etc1-1-13 1-1 tx m/a-com/etc1-1-13 24 5 r9, r1, r2, r38, r39 chip resistor 0603 select 25 3 r18, r14, r35 chip resistor 0603 25 ? 26 2 r40, r41 chip resistor 0603 10 k ? 27 1 r34 chip resistor 1.2 k ? 28 1 r33 chip resistor 100 ? total 82 34 1 these items are included in the pcb design but are omitted at assembly.
ad9235 rev. c | page 36 of 40 outline dimensions 28 15 14 1 8 0 compliant to jedec standards mo-153ae seating plane coplanarity 0.10 1.20 max 6.40 bsc 0.65 bsc pin 1 0.30 0.19 0.20 0.09 4.50 4.40 4.30 0.75 0.60 0.45 9.80 9.70 9.60 0.15 0.05 f i gure 63. 2 8 -l ead thin shr i nk s m a l l o u tline p a ckage [ t ssop ] (ru - 28) di me nsio ns sho w n i n mi ll im e t e r s compliant to jedec standards mo-220-vhhd-2 0.30 0.23 0.18 0.20 ref 0.80 max 0.65 typ 0.05 max 0.02 nom 12 max 1.00 0.85 0.80 seating plane coplanarity 0.08 1 32 8 9 25 24 16 17 0.50 0.40 0.30 3.50 ref 0.50 bsc pin 1 indicato r top view 5.00 bsc sq 4.75 bsc sq 3.25 3.10 sq 2.95 pin 1 indicator 0.60 max 0.60 max 0.25 min exposed pad (b o t tom view) f i gure 64. 3 2 -l ead l e ad f r a m e ch ip s c a l e p a ck ag e [lfcs p ] 5 mm 5 m m b o d y (cp - 3 2 -2) di me nsio ns sho w n i n mi ll im e t e r s
ad9235 rev. c | page 37 of 40 ordering guide model temperature range package description package option ad9235bru-20 C40c to +85c 28-lead thin shri nk small outline package (tssop) ru-28 ad9235brurl7-20 C40c to +85c 28-lead thin sh rink small outline package (tssop) ru-28 ad9235bruz-20 1 C40c to +85c 28-lead thin shrink small outline package (tssop) ru-28 AD9235BRUZRL7-20 1 C40c to +85c 28-lead thin shrink small outline package (tssop) ru-28 ad9235bru-40 C40c to +85c 28-lead thin shri nk small outline package (tssop) ru-28 ad9235brurl7-40 C40c to +85c 28-lead thin sh rink small outline package (tssop) ru-28 ad9235bruz-40 1 C40c to +85c 28-lead thin shrink small outline package (tssop) ru-28 ad9235bruzrl7-40 1 C40c to +85c 28-lead thin shrink small outline package (tssop) ru-28 ad9235bru-65 C40c to +85c 28-lead thin shri nk small outline package (tssop) ru-28 ad9235brurl7-65 C40c to +85c 28-lead thin sh rink small outline package (tssop) ru-28 ad9235bruz-65 1 C40c to +85c 28-lead thin shrink small outline package (tssop) ru-28 ad9235bruzrl7-65 1 C40c to +85c 28-lead thin shrink small outline package (tssop) ru-28 ad9235bcp-20 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235bcprl7-20 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235bcpz-20 1 , 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235bcpzrl7-20 1 , 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235bcp-40 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235bcprl7-40 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235bcpz-40 1 , 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235bcpzrl7-40 1 , 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235bcp-65 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235bcprl7-65 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235bcpz-65 1 , 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235bcpzrl7-65 1 , 2 C40c to +85c 32-lead lead frame chip scale package (lfcsp) cp-32-2 ad9235-20pcb tssop evaluation board ad9235-40pcb tssop evaluation board ad9235-65pcb tssop evaluation board ad9235bcp-20eb lfcsp evaluation board ad9235bcp-40eb lfcsp evaluation board ad9235bcp-65eb lfcsp evaluation board 1 z = pb-free part. 2 it is recommended that the exposed paddle be soldered to the ground plane. there is an increased reliability of the solder joi nts and maximum thermal capability of the package is achieved with exposed pa ddle soldered to the customer board.
ad9235 rev. c | page 38 of 40 notes
ad9235 rev. c | page 39 of 40 notes
ad9235 rev. c | page 40 of 40 notes ? 2004 analo g de vices, inc. all rights reserve d . tra d em arks and registered tra d ema r ks are the prop erty of their respective owners . c02461C0 C 10/04(c)

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